It doesn't make any more sense
Viewing post in Digital Logic Sim (old version) comments
I mean something like this:
From a higher level component you see the "8-bit" input as a single "dot", and then you can connect it to other "8-bit" inputs as one line, without having to explicitly map all underlying connection. then it will look like a "bus". In the lower-level components then you will have the option to "expand" the 8-bit input into discrete bits to work with them individually if need be. Hope that makes more sense now.