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I made a custom ALU (with more features than SebLauge ALU)

A topic by Loganh4005 created Jan 02, 2023 Views: 1,276 Replies: 16
Viewing posts 1 to 8

I made an ALU in the DLS with:

And, not, or, xor, add, subtract, increment, decrement, Shift Left, Shift right

The ADD SUB chip is just seb's  alu

you could easily turn this into an 8-bit ALU, unfortunately DLS can only hold 16 pins at the very most, god i wish we could have more pins

(2 edits)

I have upgraded his spaghet 4 bit logical processor to a spaghet 8 bit logical processor. And addition got rolled into it. You can have more than sixteen pins. SUBTR8 has 18, and this chip now has 20.
Edit: There needs to be an OR gate between mode select and SUBTR8.

Here's what I think to be an 8 bit SpaghetLU. The mode switcher could be more refined, but with all the buttons shoved together due to there just not being much room, it will just have to work like this. But it does work.

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How many instructions does it have? (or does it have all mine)

It has the same instructions, it just has 8 bit inputs, because someone in this thread insinuated it couldn't be done.

Developer(+1)

Nice! I'll definitely need to make the work-space larger..

maybe add a movement system for the camera instead? or large

(+1)

yeah, i was thinking make a "infinite" plane to move around in to make circuits instead of a limited space.

(+1)

That would be very interesting to play around in, but would be difficult to implement because of the inputs and outputs. They could be placed in the plane where they were created, but then there is the problem of having to travel around and look for the inputs and outputs. Still fun to think about though.

I got a zoom/pan feature working for the previous version without too much difficulty, I don't think I have the code anymore but it wasn't more than ~40 lines of code total. The other PRs on the GitHub also include a very nice bus implementation that you may be interested in taking notes from. One issue I did notice with the zooming is that while the internals of a chip could then be any size, the number of pins were still limited by the sides of the chip, and busses alleviated this problem mostly but not completely. It might involve some restructuring, but adding pin chips that can be placed in the workspace would likely solve this issue.

where can i find the PRs?

(1 edit)

https://github.com/DigitalLogicSimCommunity/Digital-Logic-Sim-CE/
Most community changes are kept here. I'll try and reimplement some of the QOL features I had added and get them in a PR in the next few days.

Isn't that for ver 0?

(1 edit)

I was unaware that a separate version was actively being developed. Well... more actively than the "main" version, anyway. I'll have to keep an eye on this!

Deleted 1 year ago
Deleted 1 year ago